1. Field of the Invention
The invention relates to a video signal processing apparatus which is provided for a digital video decoder for decoding digital composite video signals in order to reconstruct an image from the digital composite video signals and, more particularly, to a video signal processing apparatus for suppressing a fluctuation of the number of sampling data of the digital composite video signals.
2. Related Background Art
Hitherto, an analog composite video signal having information of one scanning line of an image is sampled at a predetermined sampling period, so that resultant digital composite video signals are sequentially supplied to a digital video decoder. Each of the analog composite video signals constructed on a scanning line unit basis includes: sync signals such as horizontal sync signal and vertical sync signal; a luminance signal and a chroma signal of one scanning line; and the like.
When a fluctuation occurs in the period of each of the analog signals due to a change of a radio wave propagating situation of each of the analog composite video signals or the like, a fluctuation occurs in the number of sampling data in each digital composite video signal corresponding to each analog signal in association with the fluctuation of the period. If the digital composite signal in which the number of sampling data, that is, the number of pixel data for one scanning line does not coincide with a predetermined reference value continuously, for example, for one field, it becomes a cause of disturbance of a reproduced video image.
Hitherto, an adjusting circuit is provided to suppress the disturbance of the image due to the fluctuation of the number of pixel data. According to the adjusting circuit, when the disturbance as mentioned above occurs in the image, an operation signal for a partial adding/deleting process of the digital signals can be manually properly supplied to the adjusting circuit.
By the operation of the adjusting circuit based on the operation signal, a predetermined number of digital data of a pixel data unit can be added or deleted to/from the position corresponding to a blanking portion of the analog signal in each digital composite video signal in accordance with the fluctuation of the number of pixel data, so that the fluctuation of the number of pixel data in the digital signals can be corrected.
It is, however, not easy that each time the disturbance starts to occur in the image, a chain of adjusting operations including a discrimination about whether the adjusting operation should be performed or not is executed by the manual operation as mentioned above. It is, therefore, demanded to automatize the chain of adjusting operations mentioned above.
On the other hand, there are: an adjusting mode in which the digital data is partially added or deleted to/from each digital composite video signal in order to correct the number of pixel data of the received digital composite video signals; and a non-adjusting mode in which such an adjustment is unnecessary for the digital video signals because of the coincidence between the numbers of pixel data and the reference value. If a mode switching is caused between both the adjusting mode and the non-adjusting mode due to the frequent switching operations between the operation and the non-operation of the adjusting circuit, contrarily, the reproduced image is liable to become unstable.
Therefore, even if a difference occurs temporarily between the number of pixel data for one scanning line and the reference value, when such a difference is very small, it is desirable not to perform the adjusting operation upon elimination of an unstable factor due to the frequent mode switching operations.
When the difference due to the dissidence mentioned above is large enough to exceed a predetermined range, there is a case where it is better not to perform the adjusting operation in the decoder.
As mentioned above, upon automatization of the adjustment of the number of sampling data for the purpose of obtaining the stable image, for example, with respect to the sum of the differences of every field, there is a proper adjusting range which shows a criterion about whether the adjusting operation should be performed or not. The adjustment in a range out of the adjusting range contrarily enhances instability of the image.
It is, therefore, an object of the invention to provide a video signal processing apparatus which automatically and properly adjusts a fluctuation of the number of sampling data of digital composite video signals in association with a fluctuation of a period of an analog composite video signal, thereby enabling a disturbance of a reproduced image to be easily and properly suppressed.
To accomplish the above object, according to the first aspect of the invention, there is provided a video signal processing apparatus which is provided for a digital video decoder for decoding continuous digital composite video signals in order to suppress a fluctuation of the number of sampling data constructing each of the digital composite video signals to be processed by the decoder, comprising: an adjusting circuit which executes a partial adding/deleting process to each of the digital composite video signals in order to correct the fluctuation of the number of sampling data of each of the digital composite video signals; and a discriminating circuit which compares the number of sampling data of each of the digital composite video signals with a reference number of sampling data of each of the digital composite video signals, discriminates whether the number of sampling data of the digital composite video signals should be increased or decreased on the basis of a difference obtained as a result of the comparison, and when the difference lies within a predetermined adjusting range, outputs an operation signal for increasing or decreasing the number of sampling data to the adjusting circuit in order to allow the adjusting circuit to execute the adding/deleting process.
According to the second aspect of the invention, in the apparatus of the first aspect, the discriminating circuit counts the number of sampling data with respect to each of a predetermined number of digital composite video signals, accumulates a difference between each of the count values obtained by the discriminating circuit and the reference number of sampling data, and outputs the operation signal when a result of the accumulation lies within the predetermined adjusting range.
According to the third aspect of the invention, in the apparatus of the second aspect, the predetermined number of digital composite video signals correspond to a scanning field which is specified between the digital composite video signals each having a vertical sync signal, and the predetermined adjusting range is given with respect to the accumulation of the differences with regard to a plurality of digital composite video signals in the field.
According to the fourth aspect of the invention, in the apparatus of the second aspect, in order to eliminate instability of image processes accompanied by the frequent switching operations between an adjusting mode in which the number of sampling data is increased or decreased and a non-adjusting mode in which the increase or decrease of the number of sampling data is not performed, as such an adjusting range for the discriminating circuit, there are provided: a first adjusting range which is used in the adjusting mode and specified by a pair of threshold values; and a second adjusting range which is specified by a pair of threshold values different from those threshold values and used in the non-adjusting mode.
According to the fifth aspect of the invention, in the apparatus of the fourth aspect, the first adjusting range includes the second adjusting range, so that hysteresis characteristics are given to switching characteristics between both the modes.
According to the sixth aspect of the invention, in the apparatus of the first aspect, each of the digital composite video signals is video information of a scanning line unit including a blanking portion, and the adding/deleting process is an increase/decrease of the blanking portion.
According to the seventh aspect of the invention, in the apparatus of the second aspect, the adjusting circuit comprises: a memory which is a memory for storing each of the digital composite video signals and has a data insertion/extraction port for performing the adding/deleting process to the signal; and a control unit which manages the memory by FIFO system and performs the adding/deleting process to each of the digital composite video signals when the control unit receives the operation signal from the discriminating circuit.
According to the eighth aspect of the invention, in the apparatus of the second aspect, the discriminating circuit comprises: a sync signal detecting unit which detects a horizontal sync signal provided for each of the composite video signals and a vertical sync signal provided for each digital signal group consisting of a predetermined number of composite video signals from the continuous digital composite video signals; a counter which counts the number of sampling data of each of the digital composite video signals and whose count value is reset to an initial value every detection of the horizontal sync signal by the detecting unit; a first register which holds a count value obtained by the counter; a first arithmetic operating unit which sequentially performs the calculation of the difference between the count value held in the register and the reference number of sampling data and performs the accumulation of each of the calculated result; a second register which stores an accumulation value obtained by the arithmetic operating unit and whose accumulation value is reset to an initial value every detection of the vertical sync signal by the detecting unit; and a discriminating unit which performs the discrimination by using the accumulation value every reset of the register.
According to the ninth aspect of the invention, in the apparatus of the eighth aspect, the sync signal detecting unit has a horizontal sync signal detecting circuit for detecting the horizontal sync signal and a vertical sync signal detecting circuit for detecting the vertical sync signal, the horizontal sync signal detecting circuit sends a signal for resetting the count value of the counter, and the vertical sync signal detecting circuit sends a signal for resetting the accumulation result in the second register.
According to the tenth aspect of the invention, in the apparatus of the eighth aspect, the arithmetic operating unit comprises: a subtracting circuit which calculates the differential number of sampling data; and an adding circuit which sequentially accumulates a result of the calculation performed by the subtracting circuit.
According to the eleventh aspect of the invention, in the apparatus of the eighth aspect, the discriminating circuit compares each of the differences in the digital signal group, obtains a maximum difference among the differences from a maximum value and a minimum value obtained by the comparison, discriminates whether each of the maximum difference and the accumulation result lies within a predetermined adjusting range or not, and discriminates whether the number of sampling data of the digital composite video signals should be increased or decreased by using each of the discriminated results.
According to the twelfth aspect of the invention, in the apparatus of the eleventh aspect, the discriminating circuit further has a second arithmetic operating unit which obtains the maximum difference between the maximum value and the minimum value, and the second arithmetic operating unit obtains the maximum difference every detection of the vertical sync signal in the sync signal detecting unit.
According to the thirteenth aspect of the invention, in the apparatus of the twelfth aspect, the discriminating unit has: a first discriminating circuit unit which discriminates whether the accumulation value that is held in the second register lies within a preset adjusting region or not; and a second discriminating circuit unit which discriminates whether the maximum difference of the second arithmetic operating unit lies within another preset adjusting region or not, and the discriminating unit makes a general decision regarding the increase/decrease of the number of sampling data on the basis of both decision results of both of the first and second discriminating circuit units.
According to the fourteenth aspect of the invention, in the apparatus of the thirteenth aspect, the discriminating unit makes the general decision on the basis of the AND of both of the decision results.
According to the fifteenth aspect of the invention, in the apparatus of the thirteenth aspect, upon operation in the adjusting mode in which the increase/decrease of the number of sampling data is performed, when the first discriminating circuit unit determines that the accumulation value does not exist in the adjusting region and the second discriminating circuit unit determines that the maximum difference value does not exist in the adjusting region, the discriminating unit makes the general decision so as to switch from the adjusting mode to the non-adjusting mode.
According to the sixteenth aspect of the invention, in the apparatus of the thirteenth aspect, upon operation in the non-adjusting mode in which the increase/decrease of the number of sampling data is not performed, when the first discriminating circuit unit determines that the accumulation value exists in the adjusting region and the second discriminating circuit unit determines that the maximum difference value exists in the adjusting region, the discriminating unit makes the general decision so as to switch from the non-adjusting mode to the adjusting mode.
According to the seventeenth aspect of the invention, in the apparatus of the thirteenth aspect, in order to eliminate instability of image processes accompanied by frequent switching operations between the adjusting mode in which the number of sampling data is increased or decreased and the non-adjusting mode in which the increase or decrease of the number of sampling data is not performed, the adjusting region for the first discriminating circuit unit comprises a first adjusting range which is used upon operation in the adjusting mode and specified by a pair of threshold values and a second adjusting range which is specified by a pair of threshold values which are different from the threshold values and used in the non-adjusting mode, and the adjusting region for the second discriminating circuit unit comprises a third adjusting range which is used upon operation in the adjusting mode and specified by a pair of threshold values and a fourth adjusting range which is specified by a pair of threshold values which are different from the threshold values in the third adjusting range and used in the non-adjusting mode.
According to the eighteenth aspect of the invention, in the apparatus of the seventeenth aspect, the first adjusting range includes the second adjusting range and the third adjusting range includes the fourth adjusting range, so that hysteresis characteristics are given to switching characteristics between both modes in the first and second discriminating circuit units.
According to the nineteenth aspect of the invention, in the apparatus of the seventeenth aspect, each of the first and second discriminating circuit units sets a decision result in each mode as a temporary decision result, makes a final decision on the basis of the temporary decision results and history of a plurality of temporary decision results so as to suppress a frequent inversion of each of the decision result, and the discriminating circuit makes the general decision on the basis of both of the final decision results made by both of the discriminating circuit units.
The above and other objects and features of the present invention will become apparent from the following detailed description and appended claims with reference to the accompanying drawings.